JEDEC JESD82 PDF
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DEFINITION OF CDCV857 PLL CLOCK DRIVER FOR REGISTERED DDR DIMM APPLICATIONS
| Published by | Publication Date | Number of Pages |
| JEDEC | 07/01/2000 | 18 |
JEDEC JESD82 – DEFINITION OF CDCV857 PLL CLOCK DRIVER FOR REGISTERED DDR DIMM APPLICATIONS
This specification is a reference for Registered DDR DIMM designers. JESD82 defines the physical, electrical, interface and timing requirements of a 1:10 PLL clock driver for DDR Registered DIMMs from DDR200 to DDR266 as refined in revision C of JEDEC Standard 21-C (JESD21-C). JESD82 was also written to meet the future performance requirements of Registered DIMMs for DDR300 and DDR333.
| Published | 07/01/2000 |
|---|---|
| Number of Pages | 18 |
| File Size | 1 file , 210 KB |
| Note | This product is unavailable in Russia, Ukraine, Belarus |
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