JEDEC JESD82-5 PDF
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STANDARD FOR DESCRIPTION OF A 3.3 V, ZERO DELAY CLOCK DISTRIBUTION DEVICE COMPLIANT WITH THE JESD21-C PC133 REGISTERED DIMM SPECIFICATION
| Published by | Publication Date | Number of Pages |
| JEDEC | 07/01/2002 | 14 |
JEDEC JESD82-5 – STANDARD FOR DESCRIPTION OF A 3.3 V, ZERO DELAY CLOCK DISTRIBUTION DEVICE COMPLIANT WITH THE JESD21-C PC133 REGISTERED DIMM SPECIFICATION
This standard defines the PLL support devices required for standard height and low profile registered PC133 SDRAM DIMM modules. The objective of the standard is to clearly define the functionality, pinout and electrical characteristics of the PLL used on JEDEC standard modules.JESD82-5 is the latest specification to be added to the JESD82 family of specifications for memory module support devices. Additional specifications are currently under development for DDR2 support devices.
| Published | 07/01/2002 |
|---|---|
| Number of Pages | 14 |
| File Size | 1 file , 91 KB |
| Note | This product is unavailable in Russia, Ukraine, Belarus |
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